Sharp CE-158 Uživatelský manuál stáhnout pdf (Strana 14)

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CONTROL

REG

ISTER BIT ASSIGNMENT TABLE

Bit

Signal

BREAK

4 3

WLS

WI.SI

SBS

EPE

Bil

Signal: Func1ion

0 PAR

l1Y

INHIBIT (Pl):

When

sea

high parity gcneralion :llld vcrificalion are lnhibiled and the PE Status bit

held low.

parity

inhibited the s

top

bits(s) will immediately follow

1he

last

da1a

bil

1ransmission.

and EPE is ignored.

EVE

N PARITY ENABLE (EPE):

When set high. even parity

generated by

the

transmillcr

and

checked by

the

receiver. Wilen

low, odd parity is selected.

2 STOP BIT SELECT (SllS):

Sec

tab

below.

WORD

LENGTH

SELECT I (WLS

I):

See table below.

4 WORD LENGTH

SEUiCT

2 {WLS2

See

1abl

e below.

Bit

Bil 3 Bit 2

WLS2 WLSI

SBS

0 0 0

0 0 1

0 I

I 1

0 0

Function

5 data bits, I stop b

S data bias, J.S stop bits

bias, I

stop

bit

6 data bits, 2 stop bits

7 data bits,

stop

bit

7 data

bias, 2

stop

bits

dala bits, 1 stop

bit

da1a

bits, 2 stop bits

Fig.

3 - Cont

rol

Rcgistar bit assignment.

INTERR

UPT

ENABL

(IE

When set high THRE. DA. THRE · TSRE,

CTS

. :llld PSI interrupts are enabled (see ln1errupt

Conditions. Table II).

6 TRANSMIT BREAK (

EAK):

Holds

SDO low when set. Once the break bit in the control regis1er has been set high. SDO will

1ay

low until the break bil is r

ese

t low and

one

the following occu

: CLEAR goes low; CTS

&oes

high;

a word is transmilled. (The 1ransmit1ed word

wil.I

nol be v

id since there c

be no

starl bit

SDO

already

low

. SDO

r;.1n

be sci high without intermediate transitions

trans·

milling

a word consisting

zeros).

TRANSMIT REQUEST

R):

set

high

, RTS

set low a

data transfer through the 1ransmit1cr is initiated

the

ini

ial

THRE interrupt. (When loading

the

Control Register from 1he bus, th

bit

inhibi1s

cha

ng-

ing

other control Oip.nops.)

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